This invention relates to a control method or a control system for signal transmission, which transmits a data signal on the basis of a reference clock between two circuits in such a device as a computer. Herein, it is to be noted that the control method or the control system is capable of easily and surely carrying out the signal transmission even in higher speeds data system.
Conventionally, methods and system for controlling signal transmission has such a problem that many receiving data which are transmitted especially over a long transmission line within a computer are incorrect. This is because, in a case where a long delay occurs to higher speed data with respect to a reference clock at a receiver side, a read timing by the reference clock can not accord with any data of data signals due to a long timing delay or big phase skew.
In order to remove the above-described problem, a clock skew adjustment system has been proposed in, for example, Japanese Unexamined Patent Publication No. Hei 2-197912, namely, 197912/1990.
Referring to FIG. 1, a reference clock A is supplied to and distributed in LSI-S (Large Scale Integration circuit of Sender side) 120 through a clock distribution gate 1 from a reference clock oscillator 10 in this system. Also, a reference clock B is supplied to and distributed in LSI-R (Large Scale Integration circuit of Receiver side) 130 through the clock distribution gate 1 from the reference clock oscillator 10 in the system.
Accordingly, data signals are transmitted from F/F (flip-flop circuit) 121 of LSI-S 120 on the basis of the reference clock A and received in F/F 131 of LSI-R 130 on the basis of the reference clock B. Generally, some skew occurs between phases of the reference clocks A and B respectively, because each transmission time is different in relation to the disposition between the clock distribution gate 1 and each of the LSI-S 120 and the LSI-R 130.
However, the reference clocks A and B can be arranged so as to be in accordance with phases corresponding to the disposition between the LSI-S 120 and the LSI-R 130 and distributed to each of a clock distributor 122 of the LSI-S 120 and a clock distributor 133 of the LSI-R 130.
Referring to a time chart illustrated in FIG. 2, in the case where phase skew does not occur between the reference clocks of LSI-S 120 and LSI-R 130, sure data transmission can be executed, because, data is surely received one after another from the data signal by each leading edge of the same phased clock in F/F 121, 131, and 132 respectively.
The reference clocks A and B can be arranged without any phase skew inside of each LSI. However, the phase skew occurs in the LSI-R 130 against the LSI-S 120 by reason of the transmission time of the data signal corresponding to the disposition between the LSI-S 120 and the LSI-R 130. Accordingly, the data signal sent from the F/F 121 may not surely be received by the clock timing in the LSI-R 130. Especially in the higher speed data, a short difference between phases will become relatively long and, as a result, the correctness in the data reception is degraded.
For the purpose of removing of the above described weak point, as illustrated in FIG. 1, a delay detector 123 in the LSI-S 120 and a delay detector 134 in the LSI-R 130 are supplied respectively. The delay detectors 123 and 134 are connected with a transmission line for delay time verification to have the same course of the transmission line of the data signal. Accordingly, it is capable of detecting any phase skew by reason of the transmission delay of the data signal to be transmitted from the LSI-S 120 to the LSI-R 130.
However, the conventional control method or control system described above requires much complicated control in order to surely transmit data signals at higher speeds in the case when the phase skew occurs by some delay timing on the data transmission line between the LSI-S and the LSI-R.
One of the reasons of the requirement for the complicated control is a necessity of clock distributors which accord to mutually phases of clocks distributed into the LSI-S and the LSI-R. Another reason is a necessity of a transmission line for delay time verification and a necessity of delay detectors which are connected to the transmission line. The transmission line is supplied between the LSI-S and the LSI-R, and the delay detectors detect phase skew by obtaining delay time of the data signal over the transmission line.